List of course syllabus items and charts
Lesson charts
00 introduction
01 risc
02 pipelining
03 dynamic ILP part I, part IIa
04 static ILP
05 caches
05b cache optymization
06a parallel architectures
06b multithreading
06c Hyperthreading technology
07 parallelism and multiprocessors
07a and 07b MESI protocol details
07c cache coherency
08 multicomputers part II (0,3 MB)
09 SIMD extensions (3,1 MB) and online tutorial (last seen 12-2022)
10 Cloud intro (IaaS) and GCP
11 Cloud setting up a virtual cluster in GCP
12 GPUs and GPGPUs: two contributions a) and b)
Lab handouts
PP01 introduction to parallel programming models (1,2 MB)
PP02 introduction to MPI
PP03 laboratory examples
Intel processors
P6 family
P6 diagram
P6 microarchitecture
Core i3-i5-i7 Nehalem – Westmere and others
Core 13-i5-i7 cache and memory organization
On sw development on shared-cache processors
Article on cache-aware parallel programming techniques models
Suggested Reading Material
1) J. L. Hennessy & D. A. Patterson. Computer Architecture: A Quantitative Approach,
3rd – 4rth and 5th editions. Elsevier – Morgan Kaufmann.
D. A. Patterson & J. L. Hennessey. Computer Organization and Design: The Hardware/Software Interface,
Revised 4th Edition. Morgan Kauffman.
2) Clay Breshears, The Art of Concurrency, 2009, O’Reilly Media, Inc.
ISBN: 9780596521530